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Senior DFT Engineer: You will be responsible for designing, implementing, and verifying DFT architectures for complex SoCs. You will work closely with RTL, physical design, and verification teams to ensure robust testability and high-quality silicon. -Define and implement DFT ar
Build and lead the delivery system that turns NXP enterprise data foundations into trusted, reusable Gold data products. The Director owns a multi-team Foundation delivery organization and orchestrates a federated network of business-domain Gold delivery teams across Finance, Sup
- Lead digital architecture, design, verification, and implementation of next-generation Power Management ICs (PMICs) for automotive and industrial applications. - Drive product execution from concept through RTL development, integration, silicon validation, qualification, and
Role Overview We are seeking an experienced Analog Design Engineer with 12-18 years of expertise in high-performance PLL and clocking solutions to join our product development team. The candidate will lead the design and development of advanced clock generation, distribution, sy
NXP Semiconductors permet des connexions sécurisées et développe les infrastructures d’un monde plus intelligent, en proposant des solutions qui rendent la vie plus simple, meilleure et plus sûre. Leader mondial des solutions de connectivité sécurisée pour les applications embarq
Responsibilities - Lead and develop the GHWE KL team. - Manage NPI/NTI Test Hardware projects and ensure on-time delivery. - Drive project execution, risk management, and issue resolution. - Manage hardware suppliers and monitor schedule, quality, cost, and performance. - Lead s
Description: APAC Central Competence Team works with external foundries to ensure stable chip supply for business lines across NXP. The primary responsibility of this role is to locally drive the lead products ramp up under new technology introduction (NTI), and within foundry p
NXP développe des technologies mixtes hautes performances pour l’automobile, contribuant à rendre les véhicules plus propres, plus sûrs et plus connectés. Au sein de l’organisation centrale CTO, les équipes d’ingénierie conçoivent des solutions analogiques, mixtes, sans fil et de
APAC Central Competence Team works with external foundries to ensure stable chip supply for business lines across NXP. The primary responsibility of this role is to locally drive the lead products ramp up under new technology introduction (NTI). The key areas of responsibility
- Define and drive NXP’s long-term strategy for high-speed interfaces, clocking architectures, PLL technologies, and associated analog foundation IP. - Analyze current and future requirements across all NXP Business Lines and Product Lines. - Develop technology roadmaps aligned w
L’équipe « NFC Software», basée à Caen, a pour responsabilité de fournir les logiciels (firmware et middleware) nécessaires au fonctionnement des composants NFC conçus par NXP. Ces composants, qui équipent une majorité des téléphones mobiles et objets connectés et leur permettent
Generic Job Description (not Job Level specific): The SW Test / Validation Engineer / Architect debugs software products through the use of systematic tests to develop, apply, and maintain quality standards for company products. Develops, modifies, and executes software test plan
For decades we at NXP have been developing innovative microchips as a world market leader that can be found almost everywhere – and make life possible as we know it today. Whether it's in credit cards, in smartphones or cars – we make sure that your life is easier, better and saf
Generic Job Description (not Job Level specific): The Digital Design Engineer / Architect is responsible for defining and realizing Digital functions on IPs, Subsystem or IC level based on required specifications. The individual is responsible for design, verification and evaluat
The candidate(s) selected will be responsible for performing scheduled and unscheduled maintenance in Chandler Fab Photo equipment area. The technician position is responsible for effectively executing tasks that are required to maintain primarily the toolsets within the followi
Responsibilities: - Implement and verify Scan, MBIST, and Boundary Scan solutions for complex SoC designs. - Perform scan insertion, DFT DRC checking, and scan chain validation to ensure testability and design quality. - Analyze fault coverage and develop ATPG patterns for produ
- Monitor process operations to assure conformance to quality standards and engineering specifications - Help troubleshoot complex process, quality & yield problems. Document new & revised specifications - Provide innovative, real time, quick response, and solutions to opera
- Accountable for disaster recovery governance, business continuity alignment, the Minimum Viable Company program, cold start capability, crisis readiness, and the enterprise recovery exercise calendar. - Coordinate Minimum Viable Company activity across CIO towers and sites on b
Au sein de la Business Line Automotive Embedded Systems de NXP, nous développons des circuits intégrés destinés à la voiture connectée. Nos activités couvrent les réseaux embarqués, l’éclairage automobile, les systèmes audio, la gestion de l’alimentation ainsi que les radars. L
Nous recherchons un(e) stagiaire motivé(e) et rigoureux(se) pour rejoindre notre équipe Analog Safety Development dans le cadre d’un stage de 6 mois axé sur la Sûreté de Fonctionnement (Functional Safety). Ce stage offre une opportunité unique d’acquérir une expérience pratique
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